Method and device for efficient trace analysis
US9104654B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 9, 2013 |
| Grant date | Aug 11, 2015 |
| Priority date | — |
| Expiry date | Jan 7, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/3041
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data storage device includes a memory and a controller coupled to the non-volatile memory. The controller is coupled to a communication interface that is configured to enable communication with a host device. The controller is configured to send a signal via a first connection of the communication interface and to send a corresponding clock signal via a second connection of the communication interface. The signal is compliant with a communication protocol that specifies that the first connection of the communication interface carries the signal while the second connection of the communication interface carries the clock signal. The first connection is testable to measure the signal to generate data indicating transitions of the signal. The data excludes measurements of the clock signal. The data is analyzable to detect an indication defined by the communication protocol and to determine an estimated bit sequence of the signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.