Method for forming deep silicon via for grounding of circuits and devices, emitter ballasting and isolation

US9105681B2 · kind B2 · utility

Assignee

• Newport Fab, LLC · US

Inventors

• Volker Blaschke · Ludwigsburg, DE
• Todd Thibeault · Brooks Road, US
• Chris Cureton · Laguna Beach, US
• Paul D. Hurwitz · Irvine, US
• Arjun Kar-Roy · Irvine, US
• David J. Howard · Irvine, US
• Marco Racanelli · Orange, US

Key dates

• Filing date: Oct 22, 2012
• Grant date: Aug 11, 2015
• Expiry date: Feb 26, 2033

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/0002
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

According to an exemplary embodiment, a semiconductor die including at least one deep silicon via is provided. The deep silicon via comprises a deep silicon via opening that extends through at least one pre-metal dielectric layer of the semiconductor die, at least one epitaxial layer of the semiconductor die, and partially into a conductive substrate of the semiconductor die. The deep silicon via further comprises a conductive plug situated in the deep silicon via opening and forming an electrical contact with the conductive substrate. The deep silicon via may include a sidewall dielectric layer and a bottom conductive layer. A method for making a deep silicon via is also disclosed. The deep silicon via is used to, for example, provide a ground connection for power transistors in the semiconductor die.