Method for fabricating semiconductor device
US9105694B2 · kind B2 · utility
3Cited by
5References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 23, 2014 |
| Grant date | Aug 11, 2015 |
| Priority date | — |
| Expiry date | May 23, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0135
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for making a semiconductor device includes forming a trench in a first layer on a substrate. A conductive layer having a pattern is formed in the trench. A first metal gate electrode is formed on the conductive layer, and a second metal gate electrode is formed on the first metal gate electrode. The first and second metal gate electrodes at least partially conform to the pattern of the conductive layer. Widths of first surfaces of the first and second metal gate electrodes are different from respective widths of second surfaces of the first and second metal gate electrodes as a result of the pattern.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.