Patent · US Active

Apparatus and circuitry for memory-based collection and verification of data integrity information

US9110796B2 · kind B2 · utility

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18Claims
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Assignee

Inventors

Key dates

Filing dateJan 27, 2009
Grant dateAug 18, 2015
Priority date
Expiry dateFeb 3, 2034

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F12/0802
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Apparatus and circuitry are provided for supporting collection and/or verification of data integrity information. A circuitry in a storage controller is provided for creating and/or verifying a Data Integrity Block (“DIB”). The circuitry comprises a processor interface for coupling with the processor of the storage controller. The circuitry also comprises a memory interface for coupling with a cache memory of the storage controller. By reading a plurality of Data Integrity Fields (“DIFs”) from the cache memory through the memory interface based on information received from the processor, the DIB is created in that each DIF in the DIB corresponds to a respective data block.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.