Switching a computer system from a high performance mode to a low power mode
US9111050B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 16, 2014 |
| Grant date | Aug 18, 2015 |
| Priority date | — |
| Expiry date | Sep 16, 2034 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D30/50
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computer system includes a first processor, a second processor, and a common memory connected to the second processor. The computer system is switched from a high performance mode, in which at least a portion of the first processor and at least a portion of components on the second processor are active, to a low power mode, in which at least a portion of the first processor is active and the components on the second processor are inactive. All central processing unit (CPU) cores on the second processor are quiesced. Traffic from the second processor to the common memory is quiesced. Paths used by the first processor to access the common memory are switched from a first path across the second processor to a second path across the second processor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.