Joining a chip to a substrate with solder alloys having different reflow temperatures
US9111793B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 29, 2013 |
| Grant date | Aug 18, 2015 |
| Priority date | — |
| Expiry date | Nov 16, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/014
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method including identifying a first connection location on a chip having a first connection type and a second connection location on the chip having a second connection type, applying a first solder alloy to the first connection location, heating the first solder alloy to a temperature sufficient to cause the first solder alloy to reflow, applying a second solder alloy to the second connection location, and heating the second solder alloy to a temperature sufficient to cause the second solder alloy to reflow.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.