Method of fabricating a ferroelectric capacitor
US9111944B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 24, 2014 |
| Grant date | Aug 18, 2015 |
| Priority date | — |
| Expiry date | Mar 24, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/688
Abstract
Ferroelectric capacitors used in ferroelectric random access memories (F-RAM) and methods for fabricating the same to reduce sidewall leakage are described. In one embodiment, the method includes depositing over a surface of a substrate, a ferro stack including a bottom electrode layer electrically coupled to a bottom electrode contact extending through the substrate, a top electrode layer and ferroelectric layer there between. A hard-mask is formed over the ferro stack, and a top electrode formed by etching through the top electrode layer and at least partially through the ferroelectric layer. A non-conductive barrier is formed on sidewalls formed by etching through the top electrode layer and at least partially through the ferroelectric layer, and then a bottom electrode is formed by etching the bottom electrode layer so that conductive residues generated by the etching are electrically isolated from the top electrode by the non-conductive barrier.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.