Substrate processing apparatus and manufacturing method for a semiconductor device
US9111972B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 27, 2005 |
| Grant date | Aug 18, 2015 |
| Priority date | — |
| Expiry date | Jun 5, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/6773
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The sizes required for maintenance are reduced and an occupying floor area is reduced. The substrate processing apparatus contains a load lock chamber 41 and a transfer chamber 24 respectively provided in order from the rear side within a case 11; and a processing chamber 53 provided above the load lock chamber 41 for processing wafers 1. An opening section 27A, and an opening and closing means 28A for opening and closing the opening section 27A are respectively provided in a location at the rear side of the transfer chamber 24 where the load lock chamber 41 is not arranged.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.