Patent · US Active

Multistage voltage regulator circuit

US9117507B2 · kind B2 · utility

1Cited by

20References

21Claims

0Family size

Assignee

Freeescale Semiconductor, Inc. · US

Inventors

Ravindraraj Ramaraju · Round Rock, US
Kenneth R. Burch · Austin, US
Charles E. Seaberg · Austin, US

Key dates

Filing date	Aug 9, 2010
Grant date	Aug 25, 2015
Priority date	—
Expiry date	Sep 3, 2033

Classification

Technology area (CPC G)Physics
CPC primaryG05F1/577
WIPO fieldControl
WIPO sectorInstruments

Abstract

Circuit embodiments of a multistage voltage regulator circuit are presented, where a circuit includes a first stage that includes a first bias transistor having a current terminal coupled to a first regulated node. The circuit also includes a second stage that includes a second bias transistor having a current terminal coupled to a second regulated node. The circuit also includes a third stage including a third bias transistor having a current terminal coupled to a third node. The circuit also includes a control loop for regulating voltages at the first and second regulated nodes, where the second regulated node is connected to a control terminal of the first bias transistor; and where the first regulated node is connected to a control terminal of the third bias transistor.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.