High-voltage semiconductor device
US9117797B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 13, 2012 |
| Grant date | Aug 25, 2015 |
| Priority date | — |
| Expiry date | Nov 13, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/516
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A withstand voltage region is formed to surround a logic circuit formation region. A high-voltage MOSFET for level shifting is formed in part of the withstand voltage region. A p− opening region is formed between a drain region of the high-voltage MOSFET and the logic circuit formation region. A shield layer connected to the negative electrode side of a power supply connected to the logic circuit formation region is disposed on the p− opening region. Thus, it is possible to provide a high-voltage semiconductor device including a level shifting circuit capable of making stable operation during the switching of a high-voltage IC and with long-term reliability.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.