Patent · US Active

Complementary metal-oxide-semiconductor device comprising silicon and germanium and method for manufacturing thereof

US9123566B2 · kind B2 · utility

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Key dates

Filing dateJul 3, 2013
Grant dateSep 1, 2015
Priority date
Expiry dateJul 3, 2033

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D86/215

Abstract

Disclosed are complementary metal-oxide-semiconductor (CMOS) devices and methods of manufacturing such CMOS devices. In some embodiments, an example CMOS device may include a substrate, and a buffer layer formed on the substrate, where the buffer layer comprises Si1-xGex, where x is less than 0.5. The example CMOS device may further include one or more pMOS channel layer elements, where each pMOS channel layer element comprises Si1-yGey, and where y is greater than x. The example CMOS device may still further include one or more nMOS channel layer elements, where each nMOS channel layer element comprises Si1-zGez, and where z is less than x. In some embodiments, the example CMOS device may be a fin field-effect transistor (FinFET) CMOS device and may further include a first fin structure including the pMOS channel layer element(s) and a second fin structure including the nMOS channel layer element(s).

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.