Integrated circuit device, electronic device and method for detecting timing violations within a clock signal
US9124258B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 10, 2010 |
| Grant date | Sep 1, 2015 |
| Priority date | — |
| Expiry date | Feb 25, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/19
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
An integrated circuit device comprises at least one clock monitor. The at least one clock monitor comprises a timer arranged to receive a clock signal, generate a first timing signal arranged to toggle between states in response to a trigger edge of the clock signal, and generate a second timing signal arranged to toggle between states in response to a trigger edge of the clock signal such that a state transition of the second timing signal in response to a trigger edge of the clock signal is delayed by a period T with respect to the trigger edge of the clock signal in response to which that transition occurs. The at least one clock monitor further comprises a detector arranged to receive at a first input thereof the first timing signal, receive at a second input thereof the second timing signal, compare states of the first and second timing signals, and configure an indication of a timing discrepancy based at least partly on the comparison of the first and second timing signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.