Patent · US Active

Memory mapping in a processor having multiple programmable units

US9128818B2 · kind B2 · utility

1Cited by

366References

16Claims

0Family size

Assignee

Intel Corporation · US

Inventors

Gilbert M. Wolrich · Framingham, US
Debra Bernstein · Sudbury, US
Daniel Cutter · Townsend, US
Christopher Dolan · Milford, US
Matthew J. Adiletta · Bolton, US

Key dates

Filing date	May 23, 2014
Grant date	Sep 8, 2015
Priority date	—
Expiry date	May 23, 2034

Classification

Technology area (CPC G)Physics
CPC primaryG06F2212/251
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

The disclosure includes, in general, among other aspects, an apparatus having multiple programmable units integrated within a processor. The apparatus has circuitry to map addresses in a single address space to resources within the multiple programmable units where the single address space includes addresses for different ones of the resources in different ones of the multiple programmable units and where there is a one-to-one correspondence between respective addresses in the single address space and resources within the multiple programmable units.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.