Power transistor with heat dissipation and method therefore
US9129930B2 · kind B2 · utility
1Cited by
10References
15Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jul 15, 2014 |
| Grant date | Sep 8, 2015 |
| Priority date | — |
| Expiry date | Jul 15, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/13091
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A device comprising a substrate, an integrated circuit (IC) die attached to the substrate on one side, a plurality of contact pads on an active side of the IC die, a plurality of thermally and electrically conductive legs, each of the legs attached to a respective one of the contact pads, and an encapsulating material formed around the substrate, the IC die, and a portion of the legs. A contact end of each of the legs is exposed, and one of the contact ends conducts a signal from a transistor in the IC die.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.