Integrated circuit packaging system with void prevention mechanism and method of manufacture thereof
US9129978B1 · kind B1 · utility
0Cited by
8References
10Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 24, 2014 |
| Grant date | Sep 8, 2015 |
| Priority date | — |
| Expiry date | Jun 24, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated circuit packaging system, and a method of manufacture of an integrated circuit packaging system thereof, includes: a singulation substrate having an air vent portion having longitudinal grooves in the air vent portion, the longitudinal grooves all parallel to each other; an integrated circuit die attached to the singulation substrate; and a molding compound on the singulation substrate, on the air vent portion, in a portion of the longitudinal grooves, and on the integrated circuit die.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.