Nonvolatile memory device and method of fabricating the same
US9130053B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 18, 2012 |
| Grant date | Sep 8, 2015 |
| Priority date | — |
| Expiry date | Dec 26, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/037
Abstract
This technology relates to a nonvolatile memory device and a method of fabricating the same. The nonvolatile memory device may include a pipe connection gate electrode configured to have a bottom buried in a groove formed in a substrate, one or more pipe channel layers formed within the pipe connection gate electrode, pairs of main channel layers each coupled to the pipe channel layer and extended in a direction substantially perpendicular to the substrate, and a plurality of interlayer insulating layers and a plurality of cell gate electrodes alternately stacked along the main channel layers, wherein the pipe connection gate electrode includes a metal silicide layer formed within the groove. The electric resistance of the pipe connection gate electrode may be greatly reduced without an increase in a substantial height by forming the metal silicide layer buried in the substrate under the pipe connection gate electrode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.