Method for manufacturing semiconductor device

US9136181B2 · kind B2 · utility

Assignee

• INSTITUTE OF MICROELECTRONICS OF THE CHINESE ACADEMY OF SCIENCES · CN

Inventors

• Qiuxia Xu · Beijing, CN
• Huilong Zhu · Poughkeepsie, US
• Gaobo Xu · Beijing, CN
• Huajie Zhou · Beijing, CN
• Dapeng Chen · Beijing, CN

Key dates

• Filing date: Dec 7, 2012
• Grant date: Sep 15, 2015
• Expiry date: Dec 12, 2032

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/017
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A method for manufacturing a semiconductor device, comprising: defining an active region on the semiconductor substrate; forming an interfacial oxide layer on a surface of the semiconductor substrate; forming a high-K gate dielectric on the interfacial oxide layer; forming a first metal gate layer on the high-K gate dielectric; forming a dummy gate layer on the first metal gate layer; patterning the dummy gate layer, the first metal gate layer, the high-K gate dielectric and the interfacial oxide layer to form a gate stack structure; forming a gate spacer surrounding the gate stack structure; forming S/D regions for NMOS and PMOS respectively; depositing interlayer dielectric and planarization by CMP to expose the surface of dummy gate layer; removing the dummy gate layer so as to form a gate opening; implanting dopant ions into the first metal gate layer; forming a second metal gate layer on the first metal gate layer so as to fill the gate opening; and performing annealing, so that the dopant ions diffuse and accumulate at an upper interface between the high-K gate dielectric and the first metal gate layer and at a lower interface between the high-K gate dielectric and the interf…