Process of electronic structure and electronic structure
US9137899B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jan 10, 2012 |
| Grant date | Sep 15, 2015 |
| Priority date | — |
| Expiry date | May 26, 2032 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49165
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A process of electronic structure is provided. First, a carrier board is provided, in which the carrier board has a first surface. Next, a first release layer is formed on the first surface of the carrier board. The first release layer has property of withstanding high-temperature and temporary adhesion capability and the first release layer entirely or mostly overlays the first surface. Then, a built-up structure is formed on the first release layer. Finally, a separating process is performed so that the built-up structure is separated from the carrier board to form an electronic structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.