System translation look-aside buffer with request-based allocation and prefetching
US9141556B2 · kind B2 · utility
1Cited by
20References
37Claims
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Key dates
| Filing date | Aug 16, 2013 |
| Grant date | Sep 22, 2015 |
| Priority date | — |
| Expiry date | Nov 28, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/681
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system TLB accepts translation prefetch requests from initiators. Misses generate external translation requests to a walker port. Attributes of the request such as ID, address, and class, as well as the state of the TLB affect the allocation policy of translations within multiple levels of translation tables. Translation tables are implemented with SRAM, and organized in groups.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.