Substrate interconnections having different sizes
US9142533B2 · kind B2 · utility
16Cited by
111References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 20, 2010 |
| Grant date | Sep 22, 2015 |
| Priority date | — |
| Expiry date | Jun 26, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15788
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A bump structure that may be used to interconnect one substrate to another substrate is provided. A conductive pillar is formed on a first substrate such that the conductive pillar has a width different than a contact surface on a second substrate. In an embodiment the conductive pillar of the first substrate has a trapezoidal shape or a shape having tapered sidewalls, thereby providing a conductive pillar having base portion wider than a tip portion. The substrates may each be an integrated circuit die, an interposer, a printed circuit board, a high-density interconnect, or the like.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.