High electron mobility transistor structure with improved breakdown voltage performance
US9147743B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 20, 2014 |
| Grant date | Sep 29, 2015 |
| Priority date | — |
| Expiry date | Feb 20, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/8503
Abstract
A method comprises epitaxially growing a gallium nitride (GaN) layer over a silicon substrate, epitaxially growing a donor-supply layer over the GaN layer, and etching a portion of the donor-supply layer. The method also comprises depositing a passivation layer over the donor-supply layer and filling the etched portion of the donor-supply layer, forming a source and a drain on the donor-supply layer, and forming a gate structure between the source and the etched portion of the donor-supply layer. The method further comprises depositing contacts over the gate structure, the source, and the drain.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.