Memory

US9147840B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Klaus Knobloch · Radeberg, DE
• Robert Strenz · Radebeul, DE

Key dates

• Filing date: Mar 3, 2014
• Grant date: Sep 29, 2015
• Expiry date: Mar 3, 2034

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10N70/8833

Abstract

A memory includes a first electrode and a second electrode formed within a first layer and includes a third electrode and a fourth electrode formed within a second layer. The memory includes a resistive-switching memory element and an antifuse element. The resistive-switching memory element includes a metal oxide layer and is disposed between the first electrode and the third electrode. The metal oxide layer has a first thickness and a forming voltage that corresponds to the first thickness. The antifuse element includes a dielectric layer and is disposed between the second electrode and the fourth electrode. The dielectric layer has a second thickness that is less than the first thickness and a dielectric breakdown voltage that is less than the forming voltage.