Circuits and read methods of RRAM
US9153316B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 18, 2014 |
| Grant date | Oct 6, 2015 |
| Priority date | — |
| Expiry date | Jun 18, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/82
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An RRAM circuit includes word lines, bit lines, source lines, memory cells, and a sense module. Each of the memory cells includes a resistor and a transistor. The resistor alternates between a high impedance and a low impedance, and is coupled to one of the bit lines. The transistor is controlled by one of the word lines and coupled between the resistor and one of the source lines. The sense module includes a switch and a sense amplifier. The switch is controlled by an output signal and coupled to one of the bit lines. The sense amplifier compares the data voltage, which is generated by a current flowing through the switch and the resistor, and a reference voltage to generate the output signal. The switch is turned off when the data voltage exceeds the reference voltage, and is turned on otherwise.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.