Patent · US Active

ASIC element including a via

US9153523B2 · kind B2 · utility

0Cited by

4References

7Claims

0Family size

Assignee

Robert Bosch GmbH · DE

Inventors

Heribert Weber · Leverkusen, DE
Hartmut Kueppers · Reutlingen, DE
Jochen Reinmuth · Reutlingen, DE
Neil Davies · Sedgefield, GB
Jens Frey · Echterdingen, DE

Key dates

Filing date	Jun 17, 2014
Grant date	Oct 6, 2015
Priority date	—
Expiry date	Jun 17, 2034

Classification

Technology area (CPC H)Electricity
CPC primaryH01L2924/0002
WIPO fieldMicro-structural and nano-technology
WIPO sectorChemistry

Abstract

In an ASIC element, vias are integrated into the CMOS processing of an ASIC substrate. The ASIC element includes an active front side in which the circuit functions are implemented. The at least one via is intended to establish an electrical connection between the active front side and the rear side of the element. The front side of the via is defined by at least one front-side trench which is completely filled, and the rear side is defined by at least one rear-side trench which is not completely filled. The rear-side trench opens into the filled front-side trench.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.