Methods of manufacturing a three-dimensional semiconductor device
US9153597B2 · kind B2 · utility
2Cited by
2References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 14, 2012 |
| Grant date | Oct 6, 2015 |
| Priority date | — |
| Expiry date | Mar 16, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B41/27
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The inventive concept provides methods of manufacturing three-dimensional semiconductor devices. In some embodiments, the methods include forming a stack structure including sacrificial layers and insulation layers, forming a trench penetrating the stack structure, forming a hydrophobic passivation element on the surfaces of the insulation layers that were exposed by the trench and selectively removing the sacrificial layers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.