PLL status detection circuit and method thereof

US9157957B1 · kind B1 · utility

Assignee

• REALTEK SEMICONDUCTOR CORP. · TW

Inventors

• Chao-Wen Tzeng · Taichung, TW
• Ying-Yen Chen · Hsinchu, TW
• Jih-Nung Lee · Hengshan, TW

Key dates

• Filing date: Mar 11, 2015
• Grant date: Oct 13, 2015
• Expiry date: Mar 11, 2035

Classification

• Technology area (CPC G): Physics
• CPC primary: G01R31/31727
• WIPO field: Measurement
• WIPO sector: Instruments

Abstract

A PLL status detection circuit and its associated method are disclosed herein. The circuit and the method are used to detect a PLL clock generated by a PLL of a chip to determine a status of the PLL. The PLL status detection circuit includes a counter, a status analyzing circuit and a status storing circuit. The counter is configured to generate a count value by counting cycles of the PLL clock according to a control signal. The status analyzing circuit, which is coupled to the counter, is configured to analyze the count value according to the control signal to generate an analyzed result. The status storing circuit, which is coupled to the status analyzing circuit, is configured to store the analyzed result. The status storing circuit is coupled to a scan chain of the chip so that the analyzed result is transmitted via the scan chain.