Virtual memory management system with reduced latency
US9158704B2 · kind B2 · utility
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2References
15Claims
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Key dates
| Filing date | Jan 24, 2013 |
| Grant date | Oct 13, 2015 |
| Priority date | — |
| Expiry date | Sep 22, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computer system using virtual memory provides hybrid memory access either through a conventional translation between virtual memory and physical memory using a page table possibly with a translation lookaside buffer, or a high-speed translation using a fixed offset value between virtual memory and physical memory. Selection between these modes of access may be encoded into the address space of virtual memory eliminating the need for a separate tagging operation of specific memory addresses.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.