Patent · US Active

Layout method for printed circuit board

US9158880B2 · kind B2 · utility

3Cited by
25References
37Claims
0Family size

Assignee

Inventors

Key dates

Filing dateOct 1, 2013
Grant dateOct 13, 2015
Priority date
Expiry dateOct 1, 2033

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2119/18
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A layout method for a printed circuit board (PCB) is provided. A memory type of a dynamic random access memory (DRAM) to be mounted on the PCB is obtained. A module group is obtained from a database according to the memory type of the DRAM, wherein the module group includes a plurality of routing modules. A plurality of PCB parameters are obtained. A specific routing module is selected from the module group according to the PCB parameters. The specific routing module is implemented into a layout design of the PCB. The specific routing module includes layout information regarding a main chip, a memory chip and a routing configuration between the main chip and the memory chip.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.