Multiplexing physical neurons to optimize power and area

US9159020B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Rodrigo Alcarez-Icaza Rivera · San Jose, US
• John V. Arthur · Mountain View, US
• Andrew S. Cassidy · San Jose, US
• Paul A. Merolla · Palo Alto, US
• Dharmendra S. Modha · San Jose, US

Key dates

• Filing date: Sep 14, 2012
• Grant date: Oct 13, 2015
• Expiry date: Nov 21, 2033

Classification

• Technology area (CPC G): Physics
• CPC primary: G06N3/063
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

Embodiments of the invention relate to a multiplexed neural core circuit. One embodiment comprises a neural core circuit including a memory device that maintains neuronal attributes for multiple neurons. The memory device has multiple entries. Each entry maintains neuronal attributes for a corresponding neuron. The core circuit further comprises a controller for managing the memory device and processing neuronal firing events targeting each neuron. The controller multiplexes computation and control logic for the neurons. In response to neuronal firing events targeting one of the neurons, the controller retrieves neuronal attributes for the target neuron from a corresponding entry of the memory device, and integrates the firing events based on the retrieved neuronal attributes to generate a firing event for the target neuron.