Inventor · Palo Alto, CA, US

Paul A. Merolla

74Patents

12h-index

36Co-inventors

80Inventor score

Filing activity: Dec 8, 2010 → Dec 27, 2021

Most-cited inventions

Patent	Title	Area	Cited by	Status
US8812414B2	Low-power event-driven neural computing architecture in neural networks	Physics	65	Active
US8909576B2	Neuromorphic event-driven neural computing architecture in a scalable neural network	Physics	54	Active
US9159020B2	Multiplexing physical neurons to optimize power and area	Physics	44	Active
US8990130B2	Consolidating multiple neurosynaptic cores into one memory	Physics	43	Active
US9466022B2	Hardware architecture for simulating a neural network of neurons	Physics	21	Active
US9373073B2	Time-division multiplexed neurosynaptic module with implicit memory addressing for implementing a universal substrate of adaptation	Physics	19	Active
US8473439B2	Integrate and fire electronic neurons	Physics	18	Active
US9269044B2	Neuromorphic event-driven neural computing architecture in a scalable neural network	Physics	15	Active
US9818058B2	Time-division multiplexed neurosynaptic module with implicit memory addressing for implementing a universal substrate of adaptation	Physics	13	Active
US9160617B2	Faulty core recovery mechanisms for a three-dimensional network on a processor array	Electricity	13	Active
US9852006B2	Consolidating multiple neurosynaptic core circuits into one reconfigurable memory block maintaining neuronal information for the core circuits	Physics	12	Active
US9992057B2	Yield tolerance in a neurosynaptic system	Electricity	12	Active
US9244124B2	Initializing and testing integrated circuits with selectable scan chains with exclusive-or outputs	Physics	11	Active
US9971965B2	Implementing a neural network algorithm on a neurosynaptic substrate based on metadata associated with the neural network algorithm	Physics	11	Active
US9087301B2	Hardware architecture for simulating a neural network of neurons	Physics	11	Active
US9218564B2	Providing transposable access to a synapse array using a recursive array layout	Physics	10	Active
US9239984B2	Time-division multiplexed neurosynaptic module with implicit memory addressing for implementing a neural network	Physics	10	Active
US9563841B2	Globally asynchronous and locally synchronous (GALS) neuromorphic network	Physics	10	Active
US9053429B2	Mapping neural dynamics of a neural model on to a coarsely grained look-up table	Physics	9	Active
US9189729B2	Scalable neural hardware for the noisy-OR model of Bayesian networks	Physics	9	Active
US8990616B2	Final faulty core recovery mechanisms for a two-dimensional network on a processor array	Electricity	9	Active
US9747545B2	Self-timed, event-driven neurosynaptic core controller	Physics	9	Active
US9704094B2	Mapping of algorithms to neurosynaptic hardware	Physics	7	Active
US9984324B2	Dual deterministic and stochastic neurosynaptic core circuit	Physics	6	Active
US10204301B2	Implementing a neural network algorithm on a neurosynaptic substrate based on criteria related to the neurosynaptic substrate	Physics	6	Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.