Semiconductor device with air gap spacer and capping barrier layer and method for fabricating the same
US9159609B2 · kind B2 · utility
13Cited by
2References
8Claims
0Family size
Assignee
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Key dates
| Filing date | Aug 27, 2013 |
| Grant date | Oct 13, 2015 |
| Priority date | — |
| Expiry date | Aug 27, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for fabricating a semiconductor device includes forming an insulation layer over a substrate; forming an open portion in the insulation layer; forming a sacrificial spacer over sidewalls of the open portion; forming, over the sacrificial spacer, a first conductive pattern in a lower section of the open portion; forming an ohmic contact layer over the first conductive pattern; forming an air gap by removing the sacrificial spacer; capping the air gap by forming a barrier layer over the ohmic contact layer; and forming a second conductive pattern over the barrier layer to fill an upper section of the open portion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.