Patent · US Active

Integrated circuits with close electrical contacts and methods for fabricating the same

US9159661B2 · kind B2 · utility

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16Claims
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Assignee

Inventors

Key dates

Filing dateNov 19, 2013
Grant dateOct 13, 2015
Priority date
Expiry dateNov 19, 2033

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/0002
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

Integrated circuits with close electrical contacts and methods for fabricating such integrated circuits are provided. The method includes forming a first and a second contact in an interlayer dielectric, and forming a recess between the first and second contact. A etch mask is formed overlying the interlayer dielectric, and the etch mask is removed from over a recess mid-point. A center contact is formed in the interlayer dielectric at the recess mid-point.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.