Methods for fabricating a semiconductor device
US9159730B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 5, 2013 |
| Grant date | Oct 13, 2015 |
| Priority date | — |
| Expiry date | Dec 26, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/485
Abstract
A method for fabricating a semiconductor device includes forming a device isolation layer pattern on a substrate to form an active region, the active region including a first contact forming region at a center p of the active region and second and third contact forming regions at edges of the active region, forming an insulating layer and a first conductive layer on the substrate, forming a mask pattern having an isolated shape on the first conductive layer, etching the first conductive layer and the insulating layer to expose the active region of the first contact forming region by using the mask pattern, to form an opening portion between pillar structures, forming a second conductive layer in the opening, and patterning the second conductive layer and the first preliminary conductive layer pattern to form a wiring structure contacting the first contact forming region and having an extended line shape.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.