Gate protected semiconductor devices
US9160326B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 8, 2013 |
| Grant date | Oct 13, 2015 |
| Priority date | — |
| Expiry date | Jul 12, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/86
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Providing gate protection to a group III-semiconductor device by delivering gate overdrive immunity is described herein. The gate protection can be achieved by embedding a gate-voltage-controlling second transistor to the gate electrode of a first transistor. In other words, a first gate electrode of the first semiconductor device is in series with a second source electrode of the second semiconductor device, and a second gate electrode of the second semiconductor device is connected to the second source electrode and the first gate electrode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.