System and method for multistage processing in a memory storage subsystem
US9164886B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 23, 2011 |
| Grant date | Oct 20, 2015 |
| Priority date | — |
| Expiry date | Jul 5, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/1006
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Embodiments of this disclosure relate to improving solid-state non-volatile memory management. Embodiments improve the management of solid-state non-volatile memory by providing an execution manager responsible for controlling the timing of providing a request to a memory unit for execution. In embodiments, the execution manager traverses a list of received requests for memory access and dispatches commands for execution. In embodiments, if a request is directed to memory units which have reached a threshold for outstanding requests, the request may be skipped so that other requests can be dispatched for memory units which have not yet reached the threshold.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.