Apparatus and method for reading data from multi-bank memory circuits
US9165619B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 17, 2013 |
| Grant date | Oct 20, 2015 |
| Priority date | — |
| Expiry date | Dec 9, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/005
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The disclosure relates to an apparatus for reading data from a memory circuit that includes at least two memory banks. The apparatus includes a first multiplexer configured to generate data at a first output from a first selected one of a first set of bit lines of a first memory bank based on a select signal. The apparatus also includes a second multiplexer configured to generate data at a second output from a second selected one of a second set of bit lines of a second memory bank based on the select signal. Additionally, the apparatus includes a gating device configured to gate the data from either the first and second multiplexer outputs based on an enable signal. And, the apparatus includes an interface circuit configured to produce the gated data on a global bit line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.