System and method for testing a radio frequency integrated circuit
US9166706B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 5, 2014 |
| Grant date | Oct 20, 2015 |
| Priority date | — |
| Expiry date | Apr 12, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/3187
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
In an embodiment, a method of testing a radio frequency integrated circuit (RFIC) includes generating high frequency test signals using the on-chip test circuit, measuring signal levels using on-chip power detectors, and controlling and monitoring the on-chip test circuit using low frequency signals. The RFIC circuit is configured to operate at high frequencies, and an on-chip test circuit that includes frequency generation circuitry configured to operate during test modes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.