Semiconductor device defect monitoring using a plurality of temperature sensing devices in an adjacent semiconductor device
US9170296B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 6, 2013 |
| Grant date | Oct 27, 2015 |
| Priority date | — |
| Expiry date | Feb 4, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/303
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
An arrangement of semiconductor devices to monitor semiconductor defects. There is a first semiconductor device arranged in proximity to a second semiconductor device, the second semiconductor device having a plurality of temperature sensing devices at locations in the second semiconductor device; a plurality of through silicon vias extending between the first semiconductor device and the second semiconductor device to electrically connect the first semiconductor device to the second semiconductor device; and a testing program to cause the plurality of temperature sensing devices in the second semiconductor device to sense the temperature at a plurality of corresponding locations in the first semiconductor device such that a predetermined rise in temperature at one location of the plurality of temperature sensing devices in the second semiconductor device is indicative of a defect in the corresponding location in the first semiconductor device. Methods of monitoring defects are also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.