Semiconductor device and method of manufacturing the same
US9171859B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 27, 2014 |
| Grant date | Oct 27, 2015 |
| Priority date | — |
| Expiry date | Jun 27, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device may include interlayer insulating patterns and local word lines which are alternately stacked to form a stepped structure, and a first insulating layer formed on a surface of the stepped structure. The semiconductor device may also include a word line selection gate formed along a surface of the first insulating layer, and active patterns passing through the word line selection gate and the first insulating layer, and connected to the local word lines, respectively.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.