Strained structure of semiconductor device and method of making the strained structure
US9171929B2 · kind B2 · utility
534Cited by
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20Claims
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Key dates
| Filing date | Jun 4, 2012 |
| Grant date | Oct 27, 2015 |
| Priority date | — |
| Expiry date | Jun 29, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/853
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An exemplary structure for a field effect transistor (FET) comprises a silicon substrate comprising a first surface; a channel portion over the first surface, wherein the channel portion has a second surface at a first height above the first surface, and a length parallel to first surface; and two source/drain (S/D) regions on the first surface and surrounding the channel portion along the length of the channel portion, wherein the two S/D regions comprise SiGe, Ge, Si, SiC, GeSn, SiGeSn, SiSn, or III-V material.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.