Aggregating unoccupied PCI-e links to provide greater bandwidth
US9176909B2 · kind B2 · utility
4Cited by
142References
27Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 11, 2009 |
| Grant date | Nov 3, 2015 |
| Priority date | — |
| Expiry date | Dec 11, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4027
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Embodiments of the claimed subject matter are directed to systems and a method that allows the aggregation of multiple interfaces of a single data communication bus to provide greater bandwidth for communication between a peripheral device and system memory within a computing system. In one embodiment, a system is provided wherein the unoccupied interfaces of the data communication bus is aggregated with an occupied interface coupled to a peripheral device to increase the bandwidth of data transfer requests between the peripheral device and the system memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.