Wide voltage range high performance sense amplifier
US9177637B1 · kind B1 · utility
6Cited by
4References
19Claims
0Family size
Assignee
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Key dates
| Filing date | Aug 28, 2014 |
| Grant date | Nov 3, 2015 |
| Priority date | — |
| Expiry date | Aug 28, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/002
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A dual rail SRAM array includes a plurality of columns of memory cells each coupled between two bit lines. A sense amplifier is coupled between each pair of bit lines. Capacitors are positioned between the sense amplifier outputs and the bit lines, thereby separating the sense amplifier from the bit lines. The memory cells are powered with an array supply voltage. The sense amplifier is powered with a peripheral supply voltage. During a read operation of the memory array, the bit lines are precharged to the array supply voltage. The sense amplifier is precharged to the peripheral supply voltage or to an intermediate voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.