Method for manufacturing fin semiconductor device using dual masking layers
US9178064B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 28, 2012 |
| Grant date | Nov 3, 2015 |
| Priority date | — |
| Expiry date | Sep 29, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/0245
Abstract
According to one embodiment, a method for manufacturing a semiconductor device, includes preparing a structure body. In the structure body, a fin extending in a first direction is formed on an upper surface of a semiconductor substrate, a lower-side mask member is provided on the fin, and an upper-side mask member that is wider than the fin and the lower-side mask member is provided on the lower-side mask member. The method includes implanting an impurity into the semiconductor substrate with the upper-side mask member and the lower-side mask member as a mask, removing the upper-side mask member, forming a gate insulator film on a side surface of the fin, forming a conductive film that covers the fin and the lower-side mask member, forming a mask for gate having a pattern extending in a second direction, and removing selectively the conductive film to form a gate electrode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.