Device and process for heating III-V wafers, and annealed III-V semiconductor single crystal wafer

US9181633B2 · kind B2 · utility

Assignee

• FREIBERGER COMPOUND MATERIALS GMBH · DE

Inventors

• Manfred Jurisch · Dresden, DE
• Stefan Eichler · Dresden, DE
• Thomas Bünger · Neubukow, DE
• Berndt Weinert · Freiberg, DE
• Frank Börner · Dresden, DE

Key dates

• Filing date: Oct 15, 2008
• Grant date: Nov 10, 2015
• Expiry date: Jun 6, 2031

Classification

• Technology area (CPC Y): Emerging Cross-Sectional Technologies
• CPC primary: Y10T428/31
• WIPO field: Surface technology, coating
• WIPO sector: Chemistry

Abstract

A device for heat treating (annealing) a III-V semiconductor wafer comprises at least one wafer support unit which is dimensioned such that a cover provided above the wafer surface is either spaced without any distance or with a distance of maximally about 2 mm to the wafer surface. A process for heat treating III-V semiconductor wafers having diameters larger than 100 mm and a dislocation density below 1×104 cm−2 is carried out in the device of the invention. SI GaAs wafers produced have an at least 25% increased characteristic fracture strength (Weibull distribution), an improved radial macroscopic and mesoscopic homogeneity and an improved quality of the mechano-chemically polished surface. The characteristic fracture strength is higher than 1900 MPa.