Memory devices and methods of manufacturing the same
US9184376B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 26, 2014 |
| Grant date | Nov 10, 2015 |
| Priority date | — |
| Expiry date | Jun 26, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N50/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A magnetic memory device may include a substrate and a magnetic tunnel junction memory element on the substrate. The magnetic tunnel junction memory element may include a reference magnetic layer, a tunnel barrier layer, and a free magnetic layer. The reference magnetic layer may include a first pinned layer, an exchange coupling layer, and a second pinned layer. The exchange coupling layer may be between the first and second pinned layers, and the second pinned layer may include a ferromagnetic layer and a non-magnetic layer. The second pinned layer may be between the first pinned layer and the tunnel barrier layer, and the tunnel barrier layer may be between the reference magnetic layer and the free magnetic layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.