Semiconductor device and method of fabricating the same
US9190404B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 24, 2013 |
| Grant date | Nov 17, 2015 |
| Priority date | — |
| Expiry date | Feb 25, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Provided are a semiconductor device and a method of fabricating the same. The device may include a transistor on a substrate comprising a gate insulating pattern, a gate electrode and an impurity region, a shared contact plug electrically connected to the gate electrode and the impurity region, and an etch-stop layer between side surfaces of the gate electrode and the shared contact. The shared contact plug may include a first conductive pattern electrically connected to the first impurity region and a second conductive pattern electrically connected to the gate electrode, and a top surface of the first conductive pattern may be higher than a top surface of the gate electrode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.