Semiconductor device and method for fabricating the same
US9190407B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 12, 2014 |
| Grant date | Nov 17, 2015 |
| Priority date | — |
| Expiry date | Dec 12, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0193
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Semiconductor devices may include a semiconductor substrate with a first semiconductor fin aligned end-to-end with a second semiconductor with a recess between facing ends of the first and second semiconductor fins. A first insulator pattern is formed adjacent sidewalls of the first and second semiconductor fins and a second insulator pattern is formed within the first recess. The second insulator pattern may have a top surface higher than a top surface of the first insulator pattern, such as to the height of the top surface of the fins (or higher or lower). First and second gates extend along sidewalls and a top surface of the first semiconductor fin. A dummy gate electrode may be formed on the top surface of the second insulator. Methods for manufacture of the same and modifications are also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.