Thin film transistor substrate, method for producing the same, and display device
US9190524B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 2, 2011 |
| Grant date | Nov 17, 2015 |
| Priority date | — |
| Expiry date | Jul 29, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/60
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
An active matrix substrate (20a) includes: an insulating substrate (10a); a first thin film transistor (5a) including a first gate electrode (11b) located on the insulating substrate (10a) and a first oxide semiconductor layer (13a) having a first channel region (Ca); a second oxide semiconductor layer (13b) including a second gate electrode (11c) located on the insulating substrate (10a) and having a second channel region (Cb); a second gate insulating film (17) covering the first oxide semiconductor layer (13a) and the second semiconductor layer (13b); and a third gate electrode (25) located on the second gate insulating film (17) and facing the first channel region (Ca) and the second channel region (Cb) with the second gate insulating film (17) interposed therebetween.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.