Resist underlayer composition, method of forming patterns and semiconductor integrated circuit device including the patterns
US9195136B2 · kind B2 · utility
0Cited by
5References
14Claims
0Family size
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Key dates
| Filing date | Nov 25, 2013 |
| Grant date | Nov 24, 2015 |
| Priority date | — |
| Expiry date | Nov 25, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG03F7/092
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A resist underlayer composition, a method of forming patterns, and semiconductor integrated circuit device, the composition including a solvent; and a compound including a moiety represented by the following Chemical Formula 1:
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.