Operating resistive memory cell
US9196360B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 22, 2014 |
| Grant date | Nov 24, 2015 |
| Priority date | — |
| Expiry date | Mar 10, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/79
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A circuit that includes a current source and a current comparator is disclosed. The current source is connected to a resistive memory cell to generate a driving current thereto. The current comparator has a sensing node connected to the current source and the resistive memory cell to sense an injection current injected to the current comparator through the sensing node, wherein when a resistive state of the resistive memory cell switches such that the current comparator determines that an amount of the injection current increases to exceed or decreases to reach threshold value, the current comparator turns off the current source.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.